19 Commits

Author	SHA1	Message	Date
Kovid Goyal	d9190ea675	DRYer	2024-02-25 09:57:41 +05:30
Kovid Goyal	57f4ea4d4a	Add some tests for broadcast from constant intrinsic	2024-02-25 09:57:41 +05:30
Kovid Goyal	9b0ae8d403	Dont use VEX encoded instructions for 128 bit ISA	2024-02-25 09:57:41 +05:30
Kovid Goyal	aed0611fb8	Avoid double trailing RET	2024-02-25 09:57:40 +05:30
Kovid Goyal	5a5e31c38b	Also zero upper at start of function	2024-02-25 09:57:40 +05:30
Kovid Goyal	db2e0e816d	Fix mixing of register types in the same function	2024-02-25 09:57:40 +05:30
Kovid Goyal	a298781b85	DRYer	2024-02-25 09:57:40 +05:30
Kovid Goyal	d5cd9ef2ca	...	2024-02-25 09:57:40 +05:30
Kovid Goyal	da31db3212	...	2024-02-25 09:57:40 +05:30
Kovid Goyal	601c4ad4df	Fix some typos	2024-02-25 09:57:40 +05:30
Kovid Goyal	68d800d4fa	make clean should clean generated asm as well	2024-02-25 09:57:40 +05:30
Kovid Goyal	9fc3db1dd1	Work on C0 index func	2024-02-25 09:57:40 +05:30
Kovid Goyal	161eae78b6	Make generated asm_* files world readable	2024-02-25 09:57:40 +05:30
Kovid Goyal	77cfd44f24	More efficient clearing of register to all zeros or all ones	2024-02-25 09:57:39 +05:30
Kovid Goyal	59be7213cf	Make set1_epi8 more general	2024-02-25 09:57:39 +05:30
Kovid Goyal	d60dacbd09	Implement > and < intrinsics for vector registers	2024-02-25 09:57:39 +05:30
Kovid Goyal	82b7b4fcce	Make a re-useable template for generating ASM index functions with different tests	2024-02-25 09:57:39 +05:30
Kovid Goyal	4e6138d785	Generate SIMD code during build	2024-02-25 09:57:39 +05:30
Kovid Goyal	de8c1e0206	Work on porting SIMD vt arser to Go for the kittens	2024-02-25 09:57:39 +05:30