Avoid double trailing RET

This commit is contained in:
Kovid Goyal
2024-02-02 06:16:33 +05:30
parent 920b8a2496
commit aed0611fb8

View File

@@ -1052,7 +1052,21 @@ func (s *Function) OutputASM(w io.Writer) {
fmt.Fprintln(w, "\tVZEROUPPER // zero upper bits of AVX registers to avoid dependencies when switching between SSE and AVX code")
}
s.Return()
has_trailing_return := false
for _, i := range s.Instructions {
if len(i) == 0 {
continue
}
if strings.HasPrefix(i, "\tRET ") {
has_trailing_return = true
} else {
has_trailing_return = false
}
}
if !has_trailing_return {
s.Return()
}
for _, i := range s.Instructions {
fmt.Fprintln(w, i)
}